An integrated RF platform for mobile networks and more

Data flow

The UmTRX high-level architecture can be seen below.

UmTRX_short_620w

Click on the image to view a larger version of the diagram.

Peripherals and buses

Peripheral
Buses
2x LMS6002D 2x SPI
2x 12-bit parallel data Rx
2x 12-bit parallel data Tx
TCXO DACSPI
FlashSPI
GPSUART
1pps
Debug UARTUART / Mini-USB
SRAM21-bit parallel address
36-bit parallel data
9-bit parallel control
1 GbE PHY8-bit parallel Tx
8-bit parallel Rx
parallel control
2x GPIO (LEDs)
Temperature sensor2x GPIO (FAN_ON and OVERHEAT signals)
Buttons1x GPIO (SAFE)
FPGA RESET
LEDs5x GPIO
FPGA DONE
Debug FPGA connector32-bit parallel bus
Mezzanine connector7x GPIO

Stacking

Multiple boards can be stacked using a standard gigabit Ethernet switch, with the option of sharing a common — onboard GPS synchronized — or external clock source.