Booting

UmTRX stores 3 files in its flash which are used for booting up:

• Safe FPGA image with built in ZPU bootloader.
• Production FPGA image with built in ZPU bootloader.
• Production ZPU image.

The simplified boot order is as follows:

1. Safe FPGA image.
2. ZPU bootloader (from the safe FPGA image).
3. Production FPGA image.
4. ZPU bootloader (from the production FPGA image).
5. Production ZPU image.

Safe mode

Safe mode is useful for when you have flashed an incorrect or buggy FPGA image, or assigned wrong IP or MAC address to UmTRX. In such cases you can enter safe mode and flash working FPGA and ZPU images to UmTRX, or just use UmTRX as you would in normal mode.

Safe mode has a number of features which make it so useful. Most importantly:

• Safe FPGA firmware is loaded instead of a production one.
• Safe ZPU firmware is loaded instead of a production one.
• The IP address is set to 192.168.10.2 instead of the one from EEPROM.
• The MAC address is set to 00:50:C2:85:3f:ff instead of the one from EEPROM.

In safe mode UmTRX loads a safe FPGA image and safe ZPU firmware, which are stored separately in flash. A safe FPGA image has the same functionality as a production one and differs only in the location in flash. Or to put it another way, the same FPGA image could be considered both safe and production depending on its location in the flash.

Entering safe mode

Follow this procedure to enter safe mode:

1. Press and hold “Safe” button.
2. Power cycle UmTRX or press “Reset” button.
3. Wait for LEDs D and F to light constantly and release “Safe” button.
4. You’re in safe mode!

Appendix: Complete boot process

1. Safe FPGA image

1. All LEDs turned off
2. FPGA loads safe image.
3. On failure:
   • stop
4. On success:
   • LED D lights
   • continue with loading a ZPU bootloader

2. ZPU bootloader (from the safe FPGA image)

1. FPGA loads ZPU bootloader.
2. LEDs A, C, E flash.
3. LED D turns on.
4. If “Safe” button is pressed:
   • interrupt boot and enter normal operation
5. The bootloader checks presence of a valid FPGA production image.
6. If not present:
   1. Check presence of a valid production ZPU image.
   2. If not present:
      • interrupt boot and enter normal operation
   3. If not present:
      • continue with loading the production ZPU image
7. If present:
   • continue with loading the FPGA production image

3. Production FPGA image

1. All LEDs turned off.
2. FPGA loads safe image.
3. On failure:
   • stop
4. On success:
   • LED D lights
   • continue with loading a ZPU bootloader

4. ZPU bootloader (from the production FPGA image)

1. FPGA loads ZPU bootloader.
2. LEDs A, C and E flash.
3. LED D turns on.
4. Check presence of a valid production ZPU image.
5. If not present:
   • interrupt boot and enter normal operation
6. If not present:
   • continue with loading the production ZPU image

5. Production ZPU image

1. FPGA loads ZPU bootloader.
2. LEDs A, C and E flash.
3. LED D turns on.

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