Click on the image to view a larger version of the diagram.
The 4xDDC firmware provides 4 DSP cores, each of which can be configured to take data from channel A or channel B. The host driver presents 4 virtual subdevices for channel A and 4 virtual subdevices for channel B.
This firmware is receive-only due to the fact that it’s not possible to fit the additional receive and transmit processing paths in the FPGA at the same time.
Since all virtual subdevices on side A and all virtual subdevices on side B share common LMS6002D chips, setting the RF frequency on one subdevice changes the frequency for all other subdevices on the same side. To avoid issues, the RF frequency should be set only once for each side, with subsequent frequency changes in DSP. In C++ this can be achieved by using POLICY_MANUAL and POLICY_NONE settings for tune requests:
// For subdev (1) // tune the receiver with no cordic // RF center frequency is rx_lo_freq // DSP offset is rx_offset uhd::tune_request_t rx_tune_req(); rx_tune_req.rf_freq_policy = uhd::tune_request_t::POLICY_MANUAL; rx_tune_req.rf_freq = rx_lo_freq; rx_tune_req.dsp_freq_policy = uhd::tune_request_t::POLICY_MANUAL; rx_tune_req.dsp_freq = rx_offset; usrp_1->set_rx_freq(rx_tune_req); // get frequency LMS is tuned to: double real_lo = usrp-1->get_rx_freq(); ... // For subdev (2), (3), (4) // don't touch center frequency, set DSP offset only // DSP offset is rx_offset uhd::tune_request_t rx_tune_req(rx_lo_freq); rx_tune_req.rf_freq_policy = uhd::tune_request_t::POLICY_NONE; rx_tune_req.rf_freq = 0; rx_tune_req.dsp_freq_policy = uhd::tune_request_t::POLICY_MANUAL; rx_tune_req.dsp_freq = rx_offset; usrp_2->set_rx_freq(rx_tune_req);
Similar behaviour in GNU Radio Companion can be achieved in a tune request by subtracting the DSP offset from the target frequency. E.g. to set a 2MHz offset for a channel, pass the following string to the “Ch X: Center Freq (HZ)” setting of a UHD sink block:
uhd.tune_request(var_freq - 2e6, 2e6)
- Flash your UmTRX with the 4xDDC ZPU firmware and the 4xDDC FPGA image. See flashing hardware page for further instructions.
- Compile and install the 4xDDC UHD version on your PC. To do this you need to switch to the fairwaves/4xDDC git branch and then follow UHD normal build instructions.
NOTE: There is currently no check to see if you are using default ZPU or FPGA firmware images with the 4xDDC host library, or vice versa. Make sure that versions of your ZPU, FPGA and host images match before reporting any bugs!
The indicator LED meaning is different to the default firmware and with the 4xDDC firmware the LEDs indicate which cores are active: